sabreW4K3@lazysoci.al to Linux@lemmy.mlEnglish · 4 months agoLinux geeks cheer as Arm wrestles x86 • The Registerwww.theregister.comexternal-linkmessage-square62fedilinkarrow-up1172cross-posted to: [email protected]
arrow-up1172external-linkLinux geeks cheer as Arm wrestles x86 • The Registerwww.theregister.comsabreW4K3@lazysoci.al to Linux@lemmy.mlEnglish · 4 months agomessage-square62fedilinkcross-posted to: [email protected]
minus-squarebamboo@lemm.eelinkfedilinkarrow-up1·4 months agoWell, not exactly. You have to remove instructions at some point. That’s what Intel’s x86-S is supposed to be. You lose some backwards compatibility but they’re chosen to have the least impact on most users.
minus-square737@lemmy.blahaj.zonelinkfedilinkarrow-up1·4 months agoWould this actually improve efficiency though or just reduce the manufacturing and development cost?
minus-squarebamboo@lemm.eelinkfedilinkarrow-up1·4 months agoInstruction decoding takes space and power. If there are fewer, smaller transistors dedicated to the task it will take less space and power.
Well, not exactly. You have to remove instructions at some point. That’s what Intel’s x86-S is supposed to be. You lose some backwards compatibility but they’re chosen to have the least impact on most users.
Would this actually improve efficiency though or just reduce the manufacturing and development cost?
Instruction decoding takes space and power. If there are fewer, smaller transistors dedicated to the task it will take less space and power.