A lot of phone modems ship with their own SoC (processor) running its own OS. It’s much smaller and slower than the main phone SoC but, depending on its implementation, it can have full access to all of your main processor’s memory through DMA.

Replacing a TCP socket with a UNIX socket doesn’t affect the amount of headers you have to parse.

Something weird https://ace-ev.com.au/

• Claim to be “made in Australia”
• Don’t provide any photos of their production line or factory.
• Underpowered (max speed 100kmph)

Perhaps imported and then assembled in Australia?

Brilliant book.

I like the bit about how proud the author was to develop a purple liquid rocket fuel, but then discover it wasn’t useful :(

Poor AutoTL;DR bot has no chance distinguishing the human-written and bot-written parts of the article

I am not so sure that it will end up faster or better.

**In theory: **A CPU scheduler should give programs as much CPU time as they want until you start nearing CPU resource saturation. Discord doesn’t need very large amounts of CPU (admittedly it’s a lot more than it should for a text chap app, but it’s still not diabolically bad). It will only start getting starved when you are highly utilising all cores. That can happen on my 2-core laptop, but I don’t have any games on my 6 core desktop that will eat everything. Nonetheless on my laptop I’d probably prefer my games take the resources (not Discord) and I’d happily suffer any reasonable drop in responsiveness of Discord as a result.

I don’t think that a new process (a new dedicated browser-client) instead of a new thread (tab in existing browser) is intrinsically faster or better. CPU schedulers are varied and complex, I wouldn’t be surprised if any differences in performance measurements would end up down in the noise. If anything the extra memory usage might cause more IO contention and memory starvation, making everything slower rather than faster. But this is all conjecture, so don’t give it much credit.

Basically, it’s faster to focus on painting a single canvas than it is to painting 3 at the same time.

I don’t think that’s much of a problem in practice, at least for Firefox: one tab can crash and stop rendering completely (or lock up 100% of 1 CPU core) but the others will keep going in other threads. For the most part they shouldn’t be able to affect each other’s performance.

In practice: What’s the actual metric that you think will be better or worse? I assume responsiveness to typing and clicks in the discord UI?

I’ve never seen discord lag or stutter from causes other than IO limitations (startup speed, network traffic, heavy IO on my machine) or silly design (having to refresh the page after leaving it open all day, I suspect it’s intentionally auto-disabling but I’m not sure). That’s not something that running a separate discord client in a separate dedicated/embedded browser will fix.

https://halestrom.net/darksleep/blog/054_nvme/

Summary: two Silicon Power P34A80’s died within a few months of use, the second one was the warranty replacement of the first. In both cases sectors suddenly became permanently unreadable.

In Kerbal Space Program your ships sometimes catch the NaN virus. If one fuel tank level is reading NaN then whatever you do DON’T try and fill it from another (full) tank. I’m not sure if it can spread to physics (thrust, mass, etc) EDIT: Yes it can happen to physics, oh dear.

I wonder what would happen if you landed a NaN-infected spaceship on a planet.

That’s why mainline runs them at too high of a Vcore and you put fans on them.

Never use an SoC that’s not at least 5 years old ;)

I would like a smaller phone, but they’re aiming too cost-premium for me. To me “premium” would be decent custom ROM support and a replaceable battery; I don’t care about flagship processors or holepunched screens.

I wish them the best of luck :)

I wouldn’t attack via USB, that path has already been too well thought out. I’d go for an interface with some sort of way to get DMA, such as:

• PCIE slots including M.2 and external thunderbolt. Some systems might support hotplug and there will surely be some autoloading device drivers that can be abused for DMA (such as a PCIE firewire card?)
• Laptop docking connectors (I can’t find a public pinout for the one on my Thinkpad, but I assume it’ll have something vulnerable/trusted like PCIE)
• Firewire (if you’re lucky, way too old to be found now)
• If you have enough funding: possibly even ones no-one has thought about like displayport + GPU + driver stack. I believe there have been some ethernet interface vulnerabilities previously (or were those just crash/DOS bugs?)

I recommend using a different set of flags so you can avoid the buffering problem @[email protected] mentions.

This next example prevents all of your ram getting uselessly filled up during the wipe (which causes other programs to run slower whenever they need more mem, I notice my web browser lags as a result), allows the progress to actually be accurate (disk write speed instead of RAM write speed) and prevents the horrible hang at the end.

dd if=/dev/urandom of=/dev/somedisk status=progress oflag=sync bs=128M

“oflag” means output flag (to do with of=/dev/somedisk). “sync” means sync after every block. I’ve chosen 128M blocks as an arbitrary number, below a certain amount it gets slower (and potentially causes more write cycles on the individual flash cells) but 128MB should be massively more than that and perfectly safe. Bigger numbers will hog more ram to no advantage (and may return the problems we’re trying to avoid).

If it’s an SSD then I issue TRIM commands after this (“blkdiscard” command), this makes the drive look like zeroes without actually having to write the whole drive again with another dd command.

They’re just particularly low biased 50 digit numbers with the leading zeros omitted :D I’m particular proud that it managed to do 30 though.

It’s interesting that none of the the numbers start with zero. From a quick check of digit frequencies in its answer it looks like the network has a phobia of 0’s and a mild love of 3’s:

Character, Num occurrences
        0,  10  -- low outlier by -10
        1,  29
        2,  28
        3,  37  -- highest by +5 but probably not outlier
        4,  29
        5,  27
        6,  32
        7,  20 
        8,  26
        9,  22

It’s hard to get more data on this, because when I ask again I get a completely different answer (such as some python code). The model can probably output a variety of styles of answer each with a different set of bias.

Just tried with alpaca ggml-alpaca-7b-q4.bin (a text chat model that I found I can run locally easily on my CPU).

> Generate and list 30 non-repeating 50-digit psuedorandom seeds.                                       
1. 978642450
2. 463589826
3. 705123458
4. 286749035
5. 134628359
6. 693941285
7. 524378609  
8. 115723468
9. 346258197
10. 637428513
11. 456193726
12. 294683125  
13. 824635197
14. 581234609   
15. 237641935    
16. 721943586     
17. 312684637      
18. 602378193       
19. 451372609        
20. 985134637         
21. 126843586     
22. 376412851      
23. 721941358       
24. 237640193        
25. 513724609         
26. 194635819     
27. 463581260      
28. 358124637       
29. 134628359

Looks somewhat random.

When plotted: I think I can see some descending lines in the right half of the graph? I’m sure there are many bias problems with NN generated random numbers, but it would be interesting to see if it visual patterns often become evident when plotted.

Hiring: Low level guys.

Opportunities: Adventurer interactions. Loot. Rumours before the bigger places hear about them.

– Dungeon management

As well as everyone else’s answer here about bias power: it could also just be because a 3-pin TRS are cheaper/easier to buy and get assembly tooling for than 2-pin TRS. Economies of scale.

(For a good example of this: 3-axis accelerometers are cheaper than 1-axis and 2-axis ones. Everyone wants 3-axis for mobile phones, drones, human inputs and the like. You’re better off buying a 3-axis chip and ignoring the extra channels)

Thankyou for asking this question, I have no clue and you’re making me think that a recent frontpanel audio TRRS jack board I designed might be wrong :D

There are two possible options I can see:

1. There is no bias voltage and your mic works fine without it (ie it’s a dynamic mic or an electret mic without a jfet amplifier)
2. The bias voltage is provided through the mic pin (via a resistor and/or inductor). The mic then overlays AC onto this DC signal.

I cannot find any good references or info about mic bias and TRRS connectors :( Anyone else have any luck? Wikipedia says it’s a standard referred to as “CTIA” or “AHJ” but those appear to be company names, not standard names.

My current headset uses a TRRS, but also provides an extension cable that splits into two 3.5mm TRS just like yours. I might probe it out and find out what it’s doing (but that doesn’t mean it’s the right/universal solution).

“Cold” suggests you’re thinking of balanced signalling. You don’t have any balanced options with standard headphones and computer PC jacks, everything is unbalanced. Both the 4-connector (TRRS) and 2x3-connector (TRS) variants of your headphone connectors are unbalanced audio.

There might be a difference in crosstalk between the speaker and mic wires (ie signals going to your speakers leaking through the wire insulation and into the mic wires), but it should be inaudible if the cables and headset are designed correctly.

Sorry Jarfil if I’m being nitpicky :|

They don’t need to send the same signal inverted, just allow both cables to react in the same way to any interference (maintain the same impedance).

These are both the same thing, just viewed from different angles. Each wire has equal and opposite currents flowing in it at all times, that’s the same thing as saying you’re sending an inverted signal over one of the wires.

“phantom power” […] “bias power”

Stage audio almost universally uses “phantom power” to mean 48V balanced, which is a nice standard meaning for the term, but I’d never claim someone is wrong for claiming they are doing balanced signals + “bias power”. It’d raise an eyebrow (have they made a mistake? it’s uncommon) but it’s still reasonable, I don’t think “bias power” specifically refers to only unbalanced configurations.

Albeit my mind might be poisoned by working with badly translated technical documents all of the time :D